Abstracts:

Supporting All Service Classes In ATM: A Novel Traffic Control Framework

Tamás Marosits and Sándor Molnár
Department of Telecommunications and Telematics, Technical University of Budapest,Pázmány Péter sétány 1/D, Budapest, Hungary H-1117

Gábor Fodor
Mobile Networks and Systems Research Department, Ericsson Radio Systems, Kistagangen 20-26, Kista, Stockholm, Sweden SE-16480

This paper presents a general traffic control framework for Asynchronous Transfer Mode (ATM) networks with its performance evaluation. The proposed traffic control scheme can incorporate all the recently considered ATM service classes including Constant Bit Rate (CBR), real time Variable Bit Rate (rtVBR), non-real time Variable Bit Rate (nrVBR), Available Bit Rate (ABR) and Unspecified Bit Rate (UBR) services. The control is based on a complete buffer partitioning architecture and on the associated buffer scheduling rule with adaptive weighting functions. We present the formulation of the traffic control as an optimization problem in a 3-dimensional Quality of Service (QoS) state space. A solution approach based on dynamic programming is also suggested. A comprehensive performance evaluation of the method has been performed based on simulations and results are presented with several examples. The QoS dependence on CBR load, VBR load, VBR burstiness, UBR load are investigated and results are demonstrated with explanations. (pp. 305-315)

Keywords:ATM Quality of Service, cell loss, cell delay, cell delay variation, service classes dynamic cell scheduling algorithm

Service Specific Information Based Resource Allocation For Multimedia Applications

István Cselényi
Broadband Internet Group, Network Services Department, Telia, Research AB, Vitsandsgatan 9, S-123 86 Farsta, Sweden

Róbert Szabó
High Speed Networks Laboratory, Dept. of Telecommunications and Telematics, Technical University of Budapest Budapest, H-1111 Sztoczek u. 2, Hungary

Efficient resource allocation with proper quality of service support is a frequently addressed topic both in the Internet and ATM community; especially in case of multimedia applications. This paper presents an intelligent allocation approach that utilizes the knowledge of multimedia application and user behavior during connection establishment. The general problem is analyzed and modeled for a simple scenario including video-phone service. The performance of proposed schemes is evaluated and benefits are highlighted in terms of connection setup time, blocking probability, over-provisioning and signaling intensity based on simulation study. (pp. 317-324)

Keywords:resource reservation, performance analysis, multimedia services, signaling

Fault-Tolerant ATM Switch Using Logical Neighborhood Network

A. Rayhan and F. Elguibaly
Dept. of Electrical and Computer Eng., University of Victoria, Victoria, B.C. V8W 3P6 Canada

A. Almulhem
Dept. of Computer Eng., King Fahd University of Petroleum and Minerals, Dhahran 31261, Saudi Arabia

A fault-tolerant ATM switch based on the logical neighborhood network is presented. The switch is targeted for terabit switching through localized traffic control and management, use of input/output queuing, distributed simple cell routing algorithm, and soft fault tolerance. The redundant hardware for fault tolerance is actively used by the switch to increase throughput, hardware utilization, and reduce cell loss and delay. For an N x N switch, the inherent structure of the LN-ATM network allows the simultaneous delivery of log₂ N+1 ATM cells to any output port. This is achieved using bit-serial operation and without speeding up the switching fabric. An attractive advantage of the proposed switch is support of data broadcast and hot-spot operation without the use of replicating hardware modules. We also propose a dynamic routing algorithm which detects blocked and/or faulty links. The switch throughput, cell loss probability, and performance under faults are studied using numerical simulation. (pp. 325-334)

Keywords:Multi-stage interconnection networks, Fault tolerance, complexity analysis, routing algorithm

Issues On Gigabit Switching Using 3-Stage Clos Networks

Fotios K. Liotopoulos
Computer Technology Institute, Akteou 11 & Poulopoulou, 11851 Thesseo, Athens, Greece

In this paper, we examine the scalability potential of 3-stage Clos networks for Gigabit ATM switching. We propose and evaluate an ATM switch architecture with a nonblocking switching capacity scalable to 160 Gbps. The switching fabric consists of a number of modular switching elements, interconnected in a 3-stage Clos network, with a total number of up to 1024 input ports and 1024 output ports (OC-3). Each switching element of the network consists of up to eight 4 x 4 switching modules, interconnected via a common bus. Internally, each module performs both input and output queuing. Cells are switched through a shared local bus. Fast arbitration logic is used to control the various busses of the network. Although there is shared resource contention, the proposed architecture can be nonblocking, if the internal bus operation is adequately fast. Simulation results show that nonblocking operation is feasible, with total internal buffering of as small as 18432 cells, achieving cell latencies of as low as 6 to 10 µsec. Given the appropriate Call Admission Control algorithm and an adequate number of middle-stage switches, the Clos network can also provide nonblocking operation at call setup. (pp. 335-346)

Keywords: Gigabit Switching, Broadband Switching, Clos Networks, ATM Switch Architecture

Performance Analysis Of Pipelined Multistage Interconnection Networks

R. Venkatesan, Yaser El-Sayed, Rajagopalan Thuppal and H. Sivakumar
Faculty of Engineering and Applied Science, Memorial University of Newfoundland, St. John's, NF, Canada, A1B 3X5

Pipelined multistage interconnection networks have been shown to exhibit excellent performance with low buffer requirements to combat internal and output blocking. Their characteristics are suitable for switch fabrics in broadband communication networks. Furthermore, their implementation is feasible using current VLSI technologies. In this paper we present the performance analyses of multistage interconnection networks and pipelined multistage interconnection networks. We also present the effects of the buffer size on the performance of pipelined multistage interconnection networks based on banyan as well as balanced gamma networks by decoupling the issues of output queueing from both internal and output blocking. Performance analyses with finite input and finite output buffers are investigated under traffic patterns created using mixes of uniform random traffic and bursty traffic; 20% of the total cells generated are assigned high priority in each simulation experiment. These traffic patterns are closer to the realistic traffic in broadband communication networks than permutation traffic or pure uniform random traffic. The results obtained demonstrate that output queuing is an architecture independent problem. (pp. 347-357)

Keywords:Broadband communications, Discrete simulation, Monte-Carlo simulation, Performance analysis

PNNI And The Optimal Design Of High-Speed ATM Networks

Abdella Battou
Center for Computational Science, U.S. Naval Research Laboratory, Washington D.C., USA

Bilal Khan and  Sean Mountcastle
ITT Industries Systems Division, at the Center for Computational Science, U.S. Naval Research Laboratory, Washington D.C., USA

In addition to being well-dimensioned and cost-effective,  a high-speed ATM network must pass some performance and robustness  tests. We propose an approach to ATM network topology design that is   driven by the performance of its routing protocol, PNNI.  Towards this end, we define performance indicators based on the time and traffic required for the protocol to first enter and subsequently return to the meta-stable state of global synchrony, in which switch views are in concordance with physical reality.  We argue that the benefits of high call admission rate and low setup latency are guaranteed by our indicators.  We use the PNNI Routing and Simulation Toolkit (PRouST), to conduct simulations of PNNI networks, with the aim of discovering how topological characteristics such as the diameter, representation size, and geodesic structure of a network affect its performance. (pp. 359-367)

Keywords:ATM Network Design, PNNI Simulation, PRouST

Performance Evaluation of A Scheduling Algorithm for Multiple Input-Queued ATM Switches

Ge Nong, Mounir Hamdi and Jogesh K. Muppala
Department of Computer Science, The Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong

Performance analysis of a cell scheduling algorithm for an input-queued ATM switch is presented in this paper. The interconnection network of the ATM switch is internally nonblocking and each input port maintains a separate queue for each output port so as to reduce the head-of-line (HOL) blocking of conventional input queuing switches. Each input is allowed to send only one cell per time slot, and each output port is allowed to accept only one cell per time slot. The cells to be transmitted in a time slot are selected using a fast, fair and efficient scheduling algorithm called iSIP[Mckeown94,Mckeown97,Mckeown98ISDN]. Using a tagged input queue approach, an approximate analytical model for evaluating the performance of the switch under IID Bernoulli traffic for different offered traffic loads is developed. The switch throughput, mean cell delay, and cell loss probability are computed from the analytical model. With the switch being under heavy traffic loads, the accuracy of the analytical model is verified using simulation. (pp. 369-381)

Keywords:Input-queued ATM switch, analytical modeling and performance evaluation

On The Determination Of Absolute Network Performance

Marlin H. Mickle
Department of Electrical Engineering, 348 Benedum Hall, University of Pittsburgh, Pittsburgh, PA  15261, U.S.A.

Any collection of networks can be termed an "internet" and can perform many useful functions. The analysis and characterization of the internet in the abstract is difficult at best and impossible at worst. The purpose of this paper is to provide a mathematical methodology for the analysis of the total performance of a collection of networks connected to form an internet. However, the internet in this case is captive and created to serve a single purpose, as is the case with numerous control problems such as the beam control of a linear accelerator. A captive internet has a theoretical capability at the physical level depending on the type of networks that have been interconnected.  This capability, in terms of bits per second, i.e., data rates, represents a convex domain of feasibility in which the network can be characterized as a single state (point in a convex space) at any instant of time.  The characterization or modeling of a captive internet in this fashion also provides a basis for analysis of the well-known internet under certain assumptions of protocols, priorities, etc. (pp. 383-387)

Keywords:Networks, Performance, Capacity, Convex Set, High Performance, Network State

The Brain As A Huygens Machine

B.E.P. Clement
Clement Neuronic Systems Ltd, 15 Everest Drive, Crickhowell, Powys, NP8 1DH, U.K.

P.V. Coveney
Department of Chemistry, University of Wales High Cross, Bangor, Gwynedd, LL57 2UW, U.K.

M. Jessel
Laboratoire de mecanique et d'acoustique du CNRS, B.P. 71, F--13277 Marseille, Cedex 9, France

P.J. Marcer
Aikido Enterprises, 53 Old Vicarage Green, Keynsham, Avon, BS18 2DH, U.K.

A mathematical description of the physical world is required which can explain the brain's actual information-processing morphology and dynamics. On the basis of Huygens' principle we propose such a neural model in which each individual biological neuron is analogous to an artificial neural network of very great complexity.  The model provides a mathematical framework in which to describe the information-processing properties of living systems. (pp. 389-398)

Keywords:brain, biological neuron, configuration space, dynamics, Huygens principle, information-processing, machine, mathematical framework, neural morphology, spin

Electroencephalographic (EEG) Correlates Of Some Activities Which May Alter Consciousness: The Transcendental Meditation Technique, Musicogenic States, Microwave Resonance Relaxation, Healer/Healee Interaction, And Alertness/Drowsiness

D. Rakovic, P. Sukovic, D. Radenovic and L.Skaric
Faculty of Electrical Engineering, PO Box 35-54, Belgrade, Yugoslavia

M. Tomasevic
"Vinca'' Institute of Nuclear Sciences, PO Box 522, Belgrade, Yugoslavia

E. Jovanov
Institute ''M. Pupin'', Computer Systems Dept., PO Box 15, Belgrade, Yugoslavia

V. Radivojevic and Z. Martinovic
Institute for Mental Health, Dept. of Clinical Neurophysiology, Belgrade, Yugoslavia

M. Car
Institute for Biological Research, Center for Multidisciplinary Studies, Belgrade, Yugoslavia

Z. Jovanovic-Ignjatic
Private Medical Practice ''LAV'', Belgrade, Yugoslavia

A key problem of finding the most complete and useful theory of consciousness may revolve around how to empirically determine different styles or states of consciousness and how to incorporate these within a single paradigm. This was our motivation to start examination of EEG correlates of some activities or substates of consciousness which occur spontaneously or are induced artificially. Our investigations demonstrated more or less characteristic features in 25 subjects practicing the transcendental meditation program (increased $alpha power in prefrontal region, increased $theta power in left frontal and right temporal regions, increased $alpha power in both temporal regions, and correlation between increased $alpha power and decreased correlation dimension), 6 subjects with 4 types of spiritual music provided to induce musicogenic states (with significant changes in only 3 cases out of 24, where increased $theta and $alpha power was observed in only those subjects who have described their musical experiences as very pleasant), 28 subjects of relaxation induced by microwave resonance therapy applied to corresponding acupuncture points (with slightly decreased EEG power in all frequency bands, especially in the left central region, which can be ascribed to higher activation of the stimulated left circulatory part of the acupuncture system; it should be also noted that persons not previously subjected to this treatment responded stronger, presumably as a consequence of the more imbalanced acupuncture system), 5 healer/healee, noncontact interactions (with increase in the maximum mean coherence of their EEG patterns in the $alpha band observed only in short 4 s time intervals), and 30 subjects for monitoring alertness/drowsiness level (with implemented automatic procedure of the neural network classifier to assess the correlation between EEG power spectrum fluctuations related to changes of vigilance level, demonstrating linear separability of the states of alert wakefulness and drowsy wakefulness, allowing very fast data processing and possible real time applications in clinical practice). New technologies applied to the EEG may permit rapid and reproducible identification of different styles or states of consciousness. Such a tool might be useful in evaluating the effectiveness of different techniques for stress reduction and for altering expressions of consciousness. (pp. 399-412)

Keywords:EEG correlates, consciousness, altered states, transcendental meditation, musicogenic states, microwave resonance relaxation, healer/healee interaction, alert wakefulness, drowsy wakefulness

Floating-Point Arithmetic And The IEEE-754 Standard, I: Number-System Design

Amos R. Omondi
School of Informatics and Engineering, Flinders University, Bedford Park, SA 5042, Australia

For many years almost every computer manufacturer had its own system for floating-point  computation, a situation that made software portability a difficult task with different machine architectures and implementations.  Moreover, not all of these systems were devised to facilitate error diagnosis or arithmetic with minimal errors.  The situation changed considerably with IEEE's introduction of a standard system (IEEE-754) that has now been adopted by almost all computer manufacturers and which solves most of the problem associated with previous floating-point systems.  Nevertheless, the rationale for the decisions made in formulation of the standard are not always well-understood. The objective of this paper is to discuss the issues involved in the design of a floating-point system and, in particular,  to explain and justify those made in the IEEE standard.  A companion paper deals with implementation issues. (pp. 413-429)

Keywords:computer arithmetic, floating-point, IEEE-754 standard

Conceptual Interactive Learning Tools Based on Computer Simulators

Damjan Zazula, Bogdan Viher, Dean Korosec, Enis Avdicausevic, Mitja Lenic and Bozidar Potocnik
University of Maribor, Faculty of Electrical Engineering and Computer Science, Smetanova 17, 2000 Maribor, Slovenia

An existent computer-based simulator may serve double purpose: simulating the basic phenomenon that was conceptually modelled by the simulator, and offering its inherent teaching characteristics at the same time. In this paper, we describe shortly the basic concepts of a simulator of electromyographic signals (EMGs), which was, first, written for a single-user environment in C++ and later ported to Java and interactive network environment. At this stage it became natural that the Java application was upgraded by the features of a teaching and learning tool. Such an integration was possible in a client-server approach providing the network users with a compact facility for generating the EMG components and signals, and learning about the electro-physiological phenomena in parallel. (pp. 431-436)

Keywords:modelling and simulation, conceptual learning, client-server, Java applets, electromyography

Intelligent Agents On The Internet And Web: Applications And Prospects

San Murugesan
WebISM (Web-based Information Systems and Methodologies) Research Group, Department of Computing and Information Systems, Faculty of Informatics, Science and Technology, University of Western Sydney Macarthur, Campbelltown NSW 2560, Australia

Intelligent agents have significant potential for a wide range of Internet and Web-based applications. They offer a new way of designing and implementing intelligent/software systems. An intelligent agent (IA) is a self-contained, autonomous software module that could perform certain tasks on behalf of its users. It could also interact with other intelligent agents and/or human in performing its task(s). There is growing interest in using intelligent software agent for a variety of tasks in diverse range of applications: personal assistants, intelligent user interfaces, managing electronic mail, navigating and retrieving information from the Internet and databases, scheduling meetings and manufacturing operations, electronic business, online shopping, negotiating for resources, decision making, design and
telecommunications. This paper gives a brief introduction to intelligent agents, outlines applications of intelligent agents on the Internet and Web, and highlights their prospects. (pp. 437-443)

Keywords:inteligent agents, Internet